In the semiconductor industry, the minimum feature sizes of microelectronic devices are approaching the deep sub-micron regime to meet the demand for faster, lower power microprocessors and digital circuits. Process development and integration issues are key challenges for new gate stack materials and silicide processing, with the imminent replacement of SiO2 with high-permittivity dielectric materials (also referred to herein as high-permittivity materials or “high-k” materials), and the use of alternative gate electrode materials to replace doped poly-Si in sub-0.1 μm complementary metal-oxide semiconductor (CMOS) technology.
Dielectric materials featuring a dielectric constant greater than that of SiO2 (k˜3.9) are commonly referred to as high-k materials. In addition, high-k materials may refer to dielectric materials that are deposited onto Si substrates rather than grown on the Si surface (SiO2, SiNxOy). High-k materials used in semiconductor applications typically incorporate metal silicates or metal oxides (e.g., Ta2O5 (k˜26), TiO2 (k˜80), ZrO2 (k˜25), Al2O3 (k˜9), HfSiO, HfO2 (k˜25)). During the manufacturing of semiconductor devices, the high-k layers are frequently etched and removed in order to allow silicidation of the source/drain regions, and to reduce the risk of unwanted metallic impurities being implanted into the source/drain regions during ion implantation.